Description
Digital circuit design using verilog and logic synthesis, the electronic properties of logic gates, electrical interfacing between logic families, asynchronous to synchronous interfacing, clock distribution and timing, VLSI design options. Students implement substantial circuits with field-programmable gate arrays.
Prerequisites
- Prerequisite(s): ELEC 2507 and ELEC 2607 .
Conditions and arrangements
- Prerequisite(s): ELEC 2507 and ELEC 2607 .
- Lectures three hours a week, laboratory three hours a week.
Reference text in its original language
Digital circuit design using verilog and logic synthesis, the electronic properties of logic gates, electrical interfacing between logic families, asynchronous to synchronous interfacing, clock distribution and timing, VLSI design options. Students implement substantial circuits with field-programmable gate arrays.
- Prerequisite(s): ELEC 2507 and ELEC 2607 .
- Lectures three hours a week, laboratory three hours a week.
Sources and references
Dates and sources are retained to help you verify the information. Translations are provided to facilitate reading; the official source governs conditions and requirements.
Source reference : https://calendar.carleton.ca/undergrad/courses/ELEC/